Tech Rumour Mill #2 – Nvidia, Intel and AMD Rumour Dump – Transcript

Note: the following is a modified and shortened version of the transcript Jim used for this video. This transcript has been revised for an article format and is not a 1:1 copy. The original video can be watched here.

Alright guys how’s it going?

When we’re in a slow period of tech releases, which we were just until about now, the rumour mills tend to go into overdrive. That’s also what I said when I decided to do my first “Tech Rumour Mill” video back in April last year.

For that video I included some of the rumours I’d heard myself and also some analysis of what I thought of some of the other guys rumours, at the end saying it would be interesting to see how it all panned out. So let’s start this one by going back over the rumours in that video to see how they did pan out, starting with the long-rumoured but non-materialising Ryzen 2800X.

So let’s just stick with the Ryzen 2000 and there’s been one or two rumours of maybe a 2800X being held back in reserve. After I looked at this slide I didn’t really liked that rumour and the more I looked into it the more I thought “It looks like the 2700X is pretty much tapped out at around 4.2 gigahertz and the reason why 2800X doesn’t exist” …

[…] so this has led to some rumour suggesting that they’re holding the 2800X back until a later point.

[…] but there are chips out there capable of doing 4.4 (gigahertz). And if that’s the case, if 4.4 is actually the top end here then obviously we should expect to see these come with Threadripper at the very least. So AMD should be stockpiling most of these better chips to launch with Threadripper later in the year.

That’s exactly what AMD did of course, launching the 2950X at 4.4GHz in late August.

I, however, somewhat blew my previously good analysis by later – in the same video – saying that “ah you know what, maybe they will launch a 2800X later after all” – which they didn’t do.

Next up was this rumour over at WCCF, Nvidia’s GTX 1180 – and some preliminary Specs, Performance, Price and Release Date. Here’s what I said:

Over at WCCF you’ve got a rumour on GTX 1180’s specs, performance, price and release date. Note that this is preliminary, but it’s 1180: based on the Turing architecture and 12nm process. This shouldn’t be too long before it arrives, which makes the lack of information even stranger.

and skipping ahead,

[…] I found this one interesting, the GPU measures around about 400 square millimeters. That’s 3584 CUDA cores and a 256-bit GDDR6 memory interface. And also quite interesting was the claim of 8 to 16 GB, climbing around the 1.6GHz base clock and a boost of around 1.8GHz and – obviously nothing of this is confirmed – the TDP expected to be around 170 to 200 Watts. Now most of this I would probably have guessed. What I would say though is that 400 square millimeters is probably a little bit larger than what I would expect out of a 12nm chip that only had a 256-bit memory. Now granted it’s got a lot more CUDA cores, however CUDA cores scale better than memory busses and with the drop to 12nm I would say possibly 380 – even 370 square millimeters would be more like it.

and then again,

[…] Looking at this 8 or 16 GB (I would be very very surprised if went as far as 16 so I would stick with 8 there) and regarding the base and boost clock, this looks fairly conservative to me. I would go [with] 1.8GHz and 2.0GHz [respectively], and possibly even expect more.

Now only one part of my analysis was really on point there: my belief that this card would be 8GB and not 16GB, that one just made sense from a financial perspective and seemed obvious to me.

The parts that weren’t on point were all off for the same reason – that reason being my assumption that TSMC’s 12nm node was actually a proper half shrink of their 16FF+. However, TSMC’s 12nm ended up basically being the same 16FF+ node with an increased reticle which allowed for much larger chips to be created but with the same transistor characteristics, the same power, performance and area.

And of course what Nvidia actually ended up doing was designing much larger GPUs for Turing.

The main stuff nobody knew about at this time was wether RTX would be replacing GTX and the branding would be further changed to the 2000 series instead of the more anticipated 1100 series – I broke all that stuff in August with my huge Turing RTX leak video. With the RTX 2080 coming in at 545 squared millimeters, and with it basically being the same 16FF+ node as Pascal, we didn’t see the improvement in clock speeds I anticipated and in fact Khalid at WCCF appears to have nailed the boost clock at 1.8GHz.

So that was a bit hit and miss – more miss I feel, however the mitigating circumstance was the node that just didn’t turn out as we thought it would be and that kind of information is extremely difficult to come by before the event.


Moving on to the next couple of rumours over at Gamer’s Nexus.

Now next up for the rumour mill, over at Gamer’s Nexus and a couple of interesting videos talking about memory. The first one was this one in HW News that AMD were researching DDR5 and HBM for CPUs. And this is what Steve said: “Our present understanding is that AMD is working with at least one memory supplier to establish an R&D lab at AMD’s Austin campus and this lab’s entire purpose is to research DDR5 and to develop DDR5 for the next generation of system memory”. Now I found that interesting, as I had also heard a rumour of AMD and DDR5 in the far future, around the 2021 time frame with AMD’s Genoa. If we follow AMD server stuff we can see here EPYC – which we all know about – is of course based on Zen Zeppelin dies on 14nm. Coming next is Zen2 7nm – and that’s called Rome, and the after that Milan comes. They’re calling it Zen3 – although the do change these number around an awful lot. But Milan is coming around 2020 on 7nm+ and Genoa comes after Milan, on 2021.

[…] But the rumour I have heard from a source I have zero reason to doubt, is that with Genoa in 2021 AMD will also support DDR5. So if you think about them researching it now just in time for 2021. And also what I’ve been told, a new socket. That wouldn’t be really surprising, the move to DDR5 would certainly require a new socket. This all lines up pretty well with what we know and with Steve over at Gamer’s Nexus getting that rumour from memory guys. And I’m not gonna give away any of my sources, but the DDR5 rumour that I had did not come from the memory guys. Two different sources talking about similar kind of thing, you can pretty much take it as granted that AMD will be first to DDR5 just after 2020. Some of the other stuff I’ve heard on the server front is kind of mind blowing, but I gonna leave that one for a future video.

As we saw very recently – in my last video in fact, Genoa was confirmed by AMD on their roadmap, described by the speaker at the event as “something completely different” and coming with a new socket and new memory. I’ll talk more about Genoa later.

Steve then went on to say this:

Steve also talked about HBM for CPUs in this one. That wouldn’t be a massive surprise to me. I haven’t heard any rumours of it, but there’s no reason why AMD would not go down that route

We learned of patents with HBM stacked on chip some time later and I expect to see it before much longer so I was in complete agreement with that rumour.

However, his second rumour was that AMD would also be making a graphics card with 9 gigabits per second GDDR5, and this is what he said.

I had a source telling me something completely different – that AMD was done with GDDR5 altogether. In the end we were both kind of wrong on this as no card with 9 Gbits per second GDDR5 turned up from AMD and definitely not on a smaller Vega. However AMD did launch the RX 590 which was a rebranded 580, with the same 8Gbps GDDR5. In terms of development though, AMD does appear to have been finished with GDDR5 by this point.

Overall I’d call that some pretty successful analysis and a clearly legitimate leak on Genoa, though of course that remains to be seen.


The final major rumour in that video was this one over at SemiAccurate, where Charlie talked about the makeup and possible launch dates of the PlayStation 5. The main rumours were it would contain a Navi GPU and from what I read elsewhere, some suggested that it would launch by the end of 2018, however I couldn’t verify that as I don’t own a subscription at SemiAccurate.

The following few minutes of the video analyzed some older leaks and some information I had got, including the existence of a Vega 10 with 2 and 3 GPUs. I then went on to analyze it all as a whole and became rather convinced that not only would Navi be a chiplet-based architecture, but so would the 7nm Vega by a real chiplet-based architecture attached by Infinity Fabric with me declaring this…

AMD isn’t giving up on high end, AMD is giving up on large chips. This was always what the master plan is all about. If you can combine smaller GPUs as one, then the manufacturing advantages are crystal clear. But it’s unlikely to be a free lunch. There will be a power cost, but that can be offset by another major advantage of the chiplet-based architecture. I’m gonna talk about that in a future video.

Now… it’s safe to say that the final part of my rumour and analysis was somewhat lacking in both. But looking at this video overall, the Genoa info I leaked was pretty massive, The 2800X stuff, the GDDR5 and HBM on CPU too was… reasonable analysis and my Turing stuff mostly failed down to TSMC’s 12nm not being what anyone thought it would be.

Overall – hit and miss would be a fair reflection.


To be frank, the rumours and leaks never stop coming my way and over the past couple of months I’ve collected some really interesting stuff… and now I’ll let you know everything I’ve been told. As usual and as you’ve just seen, don’t go putting your mortgage on all or even any of this coming true. All I’ll say is that while I trust my sources, they just cannot possibly always be correct, because plans change over a year or two.

Sometimes the wires get a little bit crossed too and the information can be confusing to analyze. Even great sources who have been 100% correct can be “wrong” simply on a minor change of plan. In general though, I believe much more of what you’ll hear in the next part of this video will come true than won’t.

So let’s start the real part of this video with Nvidia and there won’t be much on them as it’s the same as last year – getting information on Nvidia these days is very, very difficult, they really are watertight on leaks.

But you’ve all heard of Ampere of course – there was all that about whether the 1100/2000 series would be called Ampere or Turing – obviously Turing won that one – and recently again we’ve been hearing more rumours on Ampere.

My latest information is… Ampere does not exist. Don’t get too surprised by that as Nvidia’s next generation cards obviously still exist, however the Ampere codename/branding apparently doesn’t. The reason for that appears to be rather obvious now I dug around – Another Silicon Valley tech company already has the Ampere brand.

The only further information I could get is that “Volta Next” or “Volta S” is coming next, however I think that’ll likely only be for the Tesla again. Performance is said to be up to 25% faster, however there was no word on whether or not it was 7nm or still 12nm. 25% faster on the same node doesn’t appear likely, however I heard that it could be down to more and faster memory.

Apparently this “Volta S” / “Volta Next” is coming very soon – late 2019 or early 2020. Presumably – assuming this is true – the desktop “Ampere” will get some other codename instead however I still haven’t heard any word on when we’ll see it.

My source also told me that Nvidia’s Tesla products are very good but the Grid licence, for GPU virtualisation, is killing them.

Basically if you want to virtualise a Tesla GPU, you have to pay the Grid license, which runs into mid single-digit thousands of dollars. And that’s paid per GPU so if you have 4 GPUs in a box then that’s 4 licenses.

And as I suggested, that was pretty much it for my Nvidia rumours.


Now moving on to the guts of the rumours, which were on Intel.

Cascade Lake AP 9200 series, that’s the huge dual-chip MCM package going up to 56 cores, is essentially no longer available. When I asked my source “You can’t get it any more?” the response was “You couldn’t get it before either”.

They apparently can be ordered from Intel if you can make a business case – which basically means if you want high enough volumes – and Intel will create a box for you. And finally, it’s not an actual socketed product either, it’s embedded.

For all intents and purposes, this Cascade Lake AP 9000 series was created so they weren’t utterly embarrassed by Rome on performance, but there are no configurators anywhere offering the part from OEM’s and it’s unlikely that there ever will be.

So what’s next for Intel on the server roadmap? From what I’ve heard, a refresh of Cascade Lake is coming in February and that will carry the “Cooper Lake” codename that was first outed by Charlie at SemiAccurate a long time ago. Apparently that part was due in December but got pushed back a couple of months.

And of course, Ice Lake comes later next year. Ice Lake is the 10nm part, by far the more interesting part and I got some interesting news on it.

Ice Lake is scheduled for the middle of 2020, though whether that means OEM system availability by then I’m not sure but would guess at a little later time, perhaps the 3rd quarter. It will support PCIe Gen 4 however currently there are very few SKUs planned – only 5 or 6 are known to my source currently – compare that to what we see with Cascade Lake and these…massive amount of SKUs. That could be a reflection on the state of 10nm or a reflection on how competitive Rome is, but as of right now, far fewer Ice Lake SKUs are planned.

According to the information from my source, the smallest Ice Lake SKU has 10 cores and there are 16, 20, 30-something, 40-something and 50-something core count chips. The TDP is said to be 130W for the 10 core but the largest core count parts are still in the 300W to 350W range.

What’s more, from the information my source has, the 10 core Ice Lake part has a higher TDP than the 12 core Cascade Lake AP. However, they didn’t know other important details like clock speeds.

I thought about this – we know Ice Lake is 10nm but we also know that Intel’s 10nm is… just awful to be frank. I don’t know if these 40 and 50 core SKUs are still gonna be the same kind of MCM setup as we see with Cascade Lake but given how bad yields are and given that I just don’t believe Intel could create a 50+ core monolithic die on 10nm, I had assumed so. Essentially they’d trade off the bad yield on 10nm to get slightly more efficient parts out on 10nm but keeping the same MCM setup and similar core counts.

When I asked about this I couldn’t get anything more. I was told however that OEMs will only go as far as 250W on air and anything above that needs to be water. Two different sources told me the same thing however apparently new chassis are being built to accomodate Intel.

EDIT – As it turns out, just as I had finished this script this article appeared over at Tom’s Hardware: Ice Lake-SP Reportedly Sports Up To 38 Cores And Lands Q3 2020

Now the dates line up but clearly, up to 38 cores is different from what my source reported to me. When I took the article to them they said that yes it was strange but they were sure that the materials they saw had at least 40+ cores Ice Lake SKUs.

If we look closely at this slide, first of all it’s from Asus, an OEM and the materials my source saw were for HPC. It’s possible that Intel could be segmenting here, essentially this 38 Core chip at an eye-watering 270W may be the best they can do for a typical OEM box which as I just said, most OEM’s will happily take up to 250W on air. There could also be 40+ core HPC parts over 300W, which again could line up with what my source reported to me.

Note also that Cascade Lake only shows up to 28 cores in this slide – not the 56 cores fantasy part that Intel pretended was available. So that backs up my sources other information perfectly. Also note that this Ice Lake 38 core part has a TDP only 30W below the 300W 48 Core 14nm Cooper Lake chip, so again that could line up with my source’s comment on the 10 core Ice Lake part having a higher TDP than the 12 core Cascade Lake part.

I’m not entirely satisfied about this clearly, as when a slide points out core counts like this it’s usually best to take it at face value. On the flip side, only having 38 Ice Lake cores would be an utter fail surpassing any other Intel failure in the past 2 years. That will get absolutely crushed by Milan.

Where this gets really interesting though is with the followup to Ice Lake – Sapphire Rapids – which is due in mid to late 2021. When I asked whether or not Ice Lake was the same MCM setup as Cascade Lake AP 9000, I was told they didn’t know but that “Sapphire Rapids is 2 Ice Lakes glued together with PCIe Gen 5 support and DDR5 support – Intel are still working out the memory controller”.

So that made me wonder if the biggest Ice Lake is a huge monolothic 50+ core die on 10nm, and then the shrink to 7nm will allow Intel to hit over 100 cores with Sapphire Rapids being two of these in an MCM.

Granite Rapids will replace Sapphire Rapids around 2023 but there was no word on core counts or technologies.


That’s the server CPUs, but what about GPU? Well, I’ve also been collecting some information on that and will throw in a bit of analysis too.

Their upcoming X to the power of e architecture has been known to be codenamed “Arctic Sound” for some time. Over at wikichip they suggest that the following codename will be “Jupiter Sound”, however I’ve been told that it will in fact be either “Glacial Sound” or “Glacier Sound”.

My source said that Glacier Sound will do graphics and acceleration but not AI. What’s more, following Glacier Sound was a very odd codename – Ponte Vecchio.

Now at this point I had to clarify with my source if this was an AMD part. AMD use the Italian codenames, not Intel, though AMD are using cities and Ponte Vecchio is this charming old bridge over the river Arno in Florence.

My source reiterated it was an Intel GPU coming after Glacier Sound, far out in late 2023.

Now getting back to the upcoming Intel Xe GPU, which we know as DG1, that appears to have come back from the fab and Intel CEO Bob Swan, during the companies recent 3rd quarter financial conference, said:

This quarter, we’ve achieved power-on exit for our first discrete GPU, DG1

before going on to say:

the achievement was “an important milestone.”

Simply put, this means it’s at a very early stage and I would seriously question that this part would be available even mid 2020. Chris Hook in fact back in March said “first availability by the end of 2020” and that will be best case, assuming nothing goes wrong.

Stuff going wrong at Intel is par for the course though and I’ll end this part of the video on them by saying that I’ve heard, from yet another source, that their upcoming 10 core Comet Lake CPU – basically the replacement for the 9900K, was set for CES announcement and launch later in the quarter, however it’s been delayed due to a “major power regulation” problem which requires a retape. We should expect to see these CPUs at best in the second quarter next year. Not really what Intel needed on the desktop… or any of us to be frank, and the recent launch of the 9900KS is more telling now as well.


Now, moving on the the final part of the video, concentrating on AMD.

With all this chaos ensuing at Intel, I suggested to my source that “Rome should be cleaning up with such a bad Intel environment”. Their response was that “Intel aren’t really falling behind that much and that AMD is only around 5% or 6% of their market.”

They continued with “Rome still isn’t in full swing” and that “most of the server guys aren’t ready for it”. Some OEMs didn’t have PCIe Gen4 ready so are essentially dropping Rome into Naples motherboards. There was also one large OEM in particular who get their servers directly from AMD and then just slap their own badge on them before rushing them out the door.

The ones who are up to speed on hardware are severely lacking on the software side of things. I’m talking about some very large OEM’s here.

As you might expect, the discussion soon turned to Intel “shenanigans” and my source said that “Intel has bought development time away from Rome”. I didn’t press them on that point but it’s fairly clear that Intel, with their vast resources and “financial horsepower”, can very easily tie up development resources for OEM’s which would be – let’s call it – more fairly spent on developing their AMD platforms.

Moving on to Milan and an interesting discussion I had with a source who believes that Milan will either come out with PCIe Gen 5 or DDR5. Now in the most recent presentation, the one that was deleted from YouTube, we clearly saw on the roadmap that Milan appears to be very much like Rome, still PCIe 3/4 and DDR4. We also see the Milan’s followup, Genoa, will be SP5 and I had information a long time ago that Genoa would be PCIe 5 and DDR5. I pushed back against this information but my source was adamant that it could be done with Milan too, technically a single-socket server with 1 DIMM Per Channel could work. I still didn’t like the idea but then later on figured that essentially, due to the chiplet architecture there is very little to stop AMD from creating a DDR5 I/O die for this purpose. Will they? I… don’t think so, but I’m tossing the idea out there anyway.

What’s more interesting that Milan? Genoa, of course. As I noted in the previous video, Genoa was in the “definition phase” which is still quite early, in planning. That made me believe that we won’t be seeing it in 2021, or if we do it’ll be very late on. On one roadmap at least it does seem Genoa is slated for 2022.

But the interesting details on that are confirmation of DDR5, PCIe Gen 5 and… 96 cores and 24 DIMMs. Current Rome EPYCs and presumably Milan too will be 64 Cores and have 16 DIMM slots so Genoa appears to be 50% on both, which lines up logically.

That was pretty much it for AMD’s server CPUs and if you look at the big picture, currently we have Rome thrashing Intel in everything except where it matters, sales. I for one am not surprised by this.

Milan vs Ice Lake looks to be similarly one-sided. Intel’s 10nm is a cluster… it’s a bust. If they really have a 56-core or so monolithic die on 10nm, yield is gonna be disastrously bad and it’ll likely just be another “benchmark hero” like the Cascade Lake AP 9000’s. If it’s this 38 core part then I don’t need to say anything more, it simply cannot compete.

It’s no wonder Intel are talking up 7nm and Sapphire Rapids so much.

But if all my info and analysis is correct, it could be very, very interesting at that point. Intel could theoretically have say, 112 cores for Sapphire Rapids around the same time that AMD is on 96 with Milan. AMD’s 96 cores will surely be vastly more manufacturable but Intel will be 17% ahead on core count at least. Whether or not they truly have a competitor to Infinity Fabric by then, we’ll have to wait – until around early 2022 – to see.

If however, Ice Lake is only 38 cores maximum (like the leaked Asus slide suggests) and Sapphire Rapids is two of those glued together, then Genoa will have a 26% advantage in core count. I find it difficult to believe that Intel would deliberately develop only a 76-core part however, as surely they must have known AMD would increase core counts.

The last piece of information I have on AMD is on Navi Instinct, which showed up on a roadmap around the same time as Milan in the middle of 2020. However, Navi will only last as long as Milan and after that AMD have another new architecture lined up with Genoa.

And that was pretty much everything I have on the big 3 up until this point. In some cases I’ve been sitting on this info for weeks if not months but I just prefer to unload it all at the one time.

As I said at the top of the video, don’t go betting your house on any of this materialising, in fact I have no “confirmation” of any of this being true, however I have a lot of trust in all these sources – the problem is wires sometimes get crossed and as always, plans can change.

I’ll catch you later guys.

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